The two WFC chips of a single image are contained in the science extensions [sci,1] and [sci,2]. By default, [sci,1] is referred to as Chip 1 and [sci,2] as Chip 2. Each chip of a WFC image has a total size of 34.3 Meg and is in FITS format. One full WFC frame is therefore 68.6 Meg in size.
The dimensions of each WFC chip are 4144 columns by 2068 rows. Each read-out is accompanied by a virtual overscan of 20 rows at rows 2049-2068. Each chip also has two 24-pixel wide physical overscan regions. The physical overscan nearest the read-out amp is called the "leading" physical overscan. A corresponding "trailing" physical overscan may be also be present depending on the choice of read-out amplifiers. For example, in a single amp read-out, these regions are located at both ends of the chip, at columns 1-24 and 4121-4144. In the standard two-amp read-out, there is no trailing physical overscan. A 1-pixel wide perimeter borders the entire data region.
In Tables 1 and 2, the row and column limits of the data and overscan regions are listed for the standard read-out with the ABCD amplifiers and with the BC read-out used with WFC Build 3. Diagrams of these regions are represented in Figs. 1 and 2.
TABLE 1 : ABCD Read-out
|Physical overscan (AC)||1-24||1-2048|
|Physical overscan (BD)||2073-2096||1-2048|
|Virtual overscan (AC)||1-2072||2049-2068|
|Virtual overscan (BD)||2073-4144||2049-2068|
|Data region (AC)||26-2072||2-2047|
|Data region (BD)||2098-4144||2-2047|
TABLE 2 : BC Read-out
|Physical overscan (BC)||1-24||1-2048|
|Physical overscan (AD)||4121-4144||1-2048|
To examine any type of calibration or science data, it is much more practical to unscramble the chips and create a mosaic of the full WFC frame. The resultant standard mosaiced WFC geometry is shown in Fig. 3. We follow the flight software (FSW) orientation where Amp A is in the bottom-left corner and amp D in the top-right corner (Note : In the standard STScI orientation, Amp A is in the top-left corner and Amp D in the bottom-right corner). When the two chips are butted, the physical overscans border the amps A-C and B-D edges and the virtual overscans form a 40-pixel wide gap between the chips. In Fig. 4, an F625W flat field is shown in the standard orientation for an ABCD read-out acquired with the flight build detector #4.
When defining subarrays, the virtual overscans are ignored, as shown in Fig. 5.