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Thermal Vacuum HRC CTE Thorough Results

AUTHOR : Michael R. Jones

DETECTOR : HRC Build 1 CCD detector (non-flight)

PURPOSE :

To characterize the CTE performance of the CCD detector over its full dynamic range. The signal range is wider and the signal resolution is finer than that of the CTE Monitor test.

DATA ACQUISITION AND REDUCTION :

Parallel and serial CTE was measured as a function of signal level using the First Pixel Response (FPR) method. FPR images were obtained at 18 signal levels using the internal Tungsten 3 flat lamp, the F502N filter and the F625W filter. The TEC temperature set point for the test was -82 °C. All data was read out through amplifier C. In order to preserve maximum signal resolution, data at the lowest 16 signal levels was acquired using a gain setting of 1. Gain settings of 2 and 4 were used at the highest two target signal levels of 70,000 electrons and 90,000 electrons, respectively, to avoid ADC saturation. The measured amplifier C system gain for gain setting 1 is 1.157 ± 0.009 electrons/count [Reference 1, straight average of all independent measurements]. The system gain for gain settings of 2 and 4 was not measured.

FPR CTE data sets were obtained in pairs at 13 of the 18 signal levels. Four frames were taken at each of the remaining 5 signal levels. Individual FPR images were bias corrected and smoothed with a one-dimensional median filter to reject hot pixels, remove cosmic ray hits and reduce random noise. Multiple images taken at the same signal level were combined into a single image by computing the straight pixel-by-pixel average of the individual median filtered frames. Neither flat field normalization to correct for pixel responsivity non-uniformity nor dark current subtraction to remove hot pixels was performed. It is anticipated that both corrections, when applied to data acquired on-orbit, will improve the quality of the FPR CTE measurement.

Some of the FPR images exhibited short row-aligned streaking noise similar to that observed in the WFC Build 1 detector. A number of frames, particularly at the lowest signal levels, were rejected because of poor S/N. The poor S/N was partially the result of contamination by the streaking noise. Individual FPR frames that yielded a CTE value of greater than 1 were excluded from the final co-added images. No attempt has been made to estimate random errors in CTE at the 13 signal levels where only two independent measurements were made. Random errors have been estimated, however, at the 5 signal levels where at least three of the four independent measurements yielded valid CTE values of less than 1.0.

It was found that the equilibrium temperature at the CCD focal plane was colder than the TEC set point. The same trend was also observed in the CTE monitor data [Reference 2]. The true focal plane temperature was derived by computing the mean of the CCDTEMP1 sensor readings recorded in the headers of the individual FITS images. Relative to the -82 °C set point, the mean CCDTEMP1 temperature for the parallel and serial CTE tests was colder by 1.1 °C and 1.3 °C, respectively. The sample standard deviation in the CCDTEMP1 temperature, to the nearest tenth of a degree, was 0.4 ° C and 0.8°C for the parallel and serial CTE tests, respectively. The true temperature for both the parallel and serial CTE tests falls within the -80 °C to -90 °C temperature range currently planned for on-orbit operation of the HRC detector.

SOFTWARE :

Reduction of the FPR data was accomplished using IDL algorithms written specifically for ACS. The two IDL routines, FPR_PAR.PRO and FPR_SER.PRO, used for the reduction of the parallel and serial FPR CTE data, respectively, have been previously documented [Reference 2]. The input FPR images must be bias corrected. Physical serial overscan pixels and virtual overscan rows, if any, must also be culled from the images. Comment lines are embedded in the routines to provide the user with information necessary to properly use the software. The same IDL software, possibly with minor improvements, will be employed for reduction of the on-orbit data.

PARALLEL CTE RESULTS :

Figure 1 shows the measured parallel FPR CTI (=1-CTE) as a function of signal level. Signal calibration in Figure 1 is approximate and assumes a system gain of 1, 2 and 4 electrons/count for amplifier gain settings of 1, 2 and 4, respectively. Figure2 shows the lowest 16 signal levels calibrated using the measured amplifier C system gain. Error bars representing one sample standard deviation in both axes are shown for the 5 signal levels with at least three valid independent CTE measurements. Propagated uncertainty in the system gain is included in the calibrated signal level error bars. The signal level error bars in both plots are smaller than the symbols. Illumination of the detector by the internal Tungsten 3 lamp was not uniform. The uncertainty in signal level due to the lamp non-uniformity was not assessed. This deficiency in error analysis will be addressed in future data sets. The 16 calibrated signal levels are, in general, systematically low by as much as ~45 percent relative to the target signal levels specified in the test plan. The magnitude of the discrepancy tends to be greatest at the lowest signal levels.

Despite the scatter in the data, the parallel CTE exhibits a clear power law dependence on signal level. Measurements from the CTE monitor test taken at temperatures of -81.6 °C and -85.4 °C compare favorably with the thorough CTE test results. The agreement between the two independent tests strongly suggests that the power law behavior is real rather than an artifact of the thorough parallel CTE test procedure. The HRC CCD detector features a 3 µm mini-channel implant in the parallel registers. There is no obvious evidence, however, of a mini-channel signature in the CTI versus signal curve.

The parallel FPR CTE data is summarized frame-by-frame (not co-added) in Table 1.

SERIAL CTE RESULTS :

Figure 3 and Figure 4 show the measured serial FPR CTI as a function of approximate (uncalibrated) signal level and calibrated signal level, respectively. As was found in the thorough parallel CTE test, the actual signal levels obtained in the serial monitor test were lower than the T/V test plan target levels. Three data points were rejected because neither frame of the pair yielded a valid value of CTE. Evaluation of random errors could be performed at only two of the five signal levels with four repeat frames because fewer than three frames yielded a valid CTE measurement.

The scatter in the data is significant, but power law behavior qualitatively similar to that observed in the parallel CTE data is still apparent. Departure from the power law dependence appears to occur at the lowest signal level data point (~50 electrons), but it is likely that this measurement has been corrupted by noise. CTE monitor measurements taken at -81.6 °C and -85.4 °C are in reasonable agreement with the thorough CTE measurements. The monitor measurements also provide independent confirmation that the power law behavior is real rather than an artifact of the thorough serial CTE test procedure or the serial FPR clock patterns. There is no evidence of a 3 µm mini-channel signature in the serial CTE curve.

The serial FPR CTE data is summarized frame-by-frame (not co-added) in Table 2.

EMPIRICAL MODELING :

Simple models of the CTE as a function of signal level have been developed using a power law of the form :

CTE(s) = 1 - A * s^B

where s is the signal level (approximate or calibrated) in electrons, A is the CTI normalization coefficient and B is the power law index. Coefficients A and B were determined by performing least-squares curve fits to the data in Figures 1-4. The curve fits are unconstrained and the data points are all unity weighted. Uncertainties in the coefficients have not been estimated, but will be in future modeling efforts. Table 3 summarizes the results.

Differences between the parallel and serial CTE performance can be best understood by comparing the power law models. The uncalibrated and calibrated signal level models are displayed in Figure 9. At signal levels above ~1000 electrons, the serial CTE exceeds the parallel CTE. The serial CTE performance margin widens with increasing signal level. Below 1000 electrons the parallel CTE exceeds the serial CTE, with a performance margin that increases with decreasing signal level. Similar trends were noted in the CTE monitor test [Reference 2]. As explained in the CTE monitor test report, the high signal level serial CTE performance advantage may be due to deferred charge trapped in the serial register. The low signal level behavior is somewhat surprising and may indicate less than optimal serial clocking.

CEI SPECIFICATIONS :

The ACS Contract End Item (CEI) Specification [Reference 3, Section 4.4.3.1] for the CTE performance of the HRC detector is >0.99999 and >0.999996 at -80 °C at signal levels of 1620 electrons/pixel and 100,000 electrons/pixel, respectively. No distinction is made in the CEI specification between parallel and serial CTE. Table 4 shows the measured CTE at 1620 electrons/pixel and 100,000 electrons/pixel derived from interpolation and extrapolation, respectively, of the empirical curve fits.

Compliance with the CEI specification cannot be judged directly from the thorough CTE test because the measurements were performed at -83.3 °C and -83.1 °C for serial and parallel transfer, respectively. No clear temperature dependence was observed in the serial CTE monitor measurements [Reference 2]. For this reason, scaling of the 1620 electron/pixel and 100,000 electron/pixel thorough serial CTE is not required.

It was discovered in the monitor test that the parallel CTE decreased with increasing temperature for all temperatures above ~-89 °C [Reference 2]. We can exploit this result to scale the thorough parallel CTE measurements. Point-to-point linear interpolation of the parallel CTE curves shown in Figure 1 of Reference 2 was performed to compute the ratio of the parallel CTE at -80.0 °C to the parallel CTE at -83.1 °C. Figure 10 depicts the parallel CTE ratio as a function of uncalibrated and calibrated signal level. The parallel CTE ratio monotonically approaches an asymptotic value of 1 with increasing signal level. Linear point-to-point interpolation of the CTE ratio curve was used to derive the scaling factor at 1620 electrons/pixel (separate values for uncalibrated and calibrated signal levels). Because of the monotonic nature of the CTE ratio, conservative scaling of the 100,000 electron/pixel thorough test measurement can be accomplished by using the ratio at the highest CTE monitor signal level (~8200 counts or ~9400 electrons).

Final results for the CTE at the CEI specification signal levels, scaled to -80 °C, are shown in Table 5. The HRC Build 1 CCD detector meets all CEI beginning of life CTE requirements.

CONCLUSION :

Nominal power law behavior in the parallel and serial CTE of the HRC Build 1 detector has been found. By modeling the data with a simple single-index power law function, it has been shown that the serial CTE is superior to the parallel CTE at signal levels above ~1000 electrons. Below 1000 electrons, the serial CTE is inferior to the parallel CTE. The reason for the inferiority of the serial CTE relative to the parallel CTE at low signal levels is unclear.

Evidence for a mini-channel signature is not readily apparent in either the serial or the parallel CTE data. This result could imply that the mini-channel in the HRC Build 1 detector is not functioning as intended. Alternatively, the mini-channel discontinuity in the CTI versus signal curves might be masked by the scatter in the data. Measurement of the mini-channel discontinuity, if it exists, could be enhanced by eliminating the streaking noise.

The HRC Build 1 CCD detector complies with all CEI beginning of life CTE requirements.

It is emphasized that the preceding conclusions may or may not be valid for the flight Build 2 HRC detector. Compliance with the CEI CTE specification should be verified by test for the Build 2 detector when it is integrated with the instrument and driven by its matched flight CEB and flight clock patterns. The thorough serial and parallel CTE tests should also, if at all possible, be repeated to confirm the power law signal dependence found in the Build 1 data. Every reasonable effort should be made to acquire data with high enough S/N to determine whether the mini-channel in the Build 2 detector is functional.

REFERENCES :

  1. HRC Build 1 Gain Calculations, Gabriel Perdue, Marco Sirianni, Gerhardt Meurer and Jon McCann, 22 June 1999.
  2. T/V CTE Monitor Results, Michael R. Jones, June 1999.
  3. HST Advanced Camera Contract End Item Specification (Part II), Document STE-50, Baseline Issue, 3 November 1995.

TABLES :

  1. Parallel FPR Thorough CTE results
  2. Serial FPR Thorough CTE results
  3. Empirical power law coefficients for serial and parallel CTE
  4. Measured CTE at CEI specification signal levels
  5. CTE at CEI specification signal levels scaled to -80°C

FIGURES :

  1. HRC Build 1 T/V Thorough Parallel CTE Test (EPS)
  2. HRC Build 1 T/V Thorough Parallel CTE Test (EPS)
  3. HRC Build 1 T/V Thorough Serial CTE Test (EPS)
  4. HRC Build 1 T/V Thorough Serial CTE Test (EPS)
  5. HRC Build 1 T/V Thorough Parallel CTE Test (EPS)
  6. HRC Build 1 T/V Thorough Parallel CTE Test (EPS)
  7. HRC Build 1 T/V Thorough Serial CTE Test (EPS)
  8. HRC Build 1 T/V Thorough Serial CTE Test (EPS)
  9. HRC Build 1 T/V Thorough Power Law Models (EPS)
  10. HRC Build 1 T/V Monitor Parallel Temperature Ratio (EPS)